* ADCSRA ADC Control and Status Registerīit6 ADSC 1 => start each conversion in single modeīit4 ADIF bit set at conversion end cleared by ISR or writng 1 to ADIFīit3 ADIE I bit in SRE = 1 & ADIE =1 -> ADC Interrpt Enableīit7 ADTS2 ADC Auto Trigger Source Selectorīit3 ACME 1 => Analog Comparator Mux Enable when ADC offīit0 PSR10 1 => Timer Counter s 0 & 1 Reset */ ![]() ![]() TCCR2 = 0x43 /* start but OC2 output disabled */ĪDMUX=ADC_VREF_TYPE /* set AVREF and right result */ #define _MCU_CLOCK_FREQUENCY_ _8.0000_MHzīit7 REFS1 set AREF refference voltage sourceīit6 REFS0 00=> AREF internal VREF turned offīit4 MUX4 select channel number and channel gainīit3 MUX3 also in case of QFP select differential inputsīit2 MUX2 in this case valid inputs 0 -> 3 inclusive
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